Many modern integrated circuits such as microprocessor and dynamic random access memory (DRAM) devices are fabricated in complementary-metal-oxide-semiconductor (CMOS) technology, where both p-channel and n-channel metal-oxide-semiconductor (MOS) transistors are formed in the same semiconductor substrate. CMOS technology combines good performance with low power consumption. The alternating p-type and n-type architecture of CMOS technology creates parasitic thyristors, or silicon controlled rectifiers (SCRs). The p-n-p-n structure of an SCR device can be analyzed as a bipolar p-n-p transistor and a bipolar n-p-n transistor interconnected to form a regenerative feedback pair. If a signal or spurious voltage exceeding the forward breakover voltage of such a parasitic SCR is applied across the device, an undesirable latchup condition can occur. Once latchup occurs, a sufficient magnitude of current can be drawn through the SCR to damage the integrated circuit device.
One technique for reducing the likelihood of latchup of the parasitic SCR is to supply a substrate bias potential that is more negative than the ground, or common, potential of the integrated circuit. The presence of the greater negative substrate bias potential can ensure that a base-emitter junction of one of the two bipolar transistors in the parasitic SCR does not become forward-biased for any expected excursions of voltages applied to the CMOS integrated circuit. A preferred technique for providing a substrate bias potential that is more negative than the ground potential of the integrated circuit is by way of a substrate bias pump circuit. The following patents assigned to Texas Instruments Incorporated provide examples of substrate bias pump circuits: U.S. Pat. No. 4,494,223, issued Jan. 15, 1985; U.S. Pat. No. 4,585,954, issued Apr. 29, 1986; U.S. Pat. No. 4,628,215, issued Dec. 9, 1986; and, U.S. Pat. No. 4,631,421, issued Dec. 23, 1986.
Memory devices and microprocessors are typically powered by an external voltage supply providing a potential, either V.sub.dd or V.sub.cc, of about 5 volts. It is desirable to operate battery powered laptop computers at lower supply potentials of approximately 2 volts.
This mismatch between system and device requirements causes particular concern with respect to the level of substrate bias potential V.sub.bb for a DRAM device. DRAM devices are very sensitive to sub-threshold leakage characteristics since they rely upon a separate transistor switch to isolate each capacitor storage element while it is storing data. As the number of storage cells on a device increases, leakage also increases. As bias current is increased to offset increased leakage, the increased bias current reduces the substrate bias voltage making the substrate bias voltage a smaller negative value. When the substrate bias has a lower negative voltage, the probability of a spurious signal causing latchup is increased. Due to density requirements in DRAM devices, the MOS transistor switches are fabricated with very narrow channels. These narrow channel MOS transistors generally require a substantial level of substrate bias to reduce subthreshold leakage current sufficiently to maintain the stored data throughout a refresh interval required by the system. As a result, charge pump circuits must be designed to provide greater charge pumping efficiency for ensuring that the level of substrate bias potential is a sufficiently large negative potential to prevent erroneous operation.
In prior art substrate bias pump arrangements, a pumping diode is interposed between each of the pumping capacitors and the substrate. When the pumping capacitors are discharged through the pumping diodes, a voltage drop occurs across the pumping diodes. That voltage drop equals a diode threshold voltage, which reduces the maximum negative potential of the substrate to the magnitude of the potential of charge stored in the pumping capacitor less the diode threshold voltage, or -V.sub.dd +V.sub.tp. In a battery powered arrangement, the resulting bias is approximately -0.8 volts. This potential is too close to ground potential for many uses.